;	[]===========================================================[]
;
;	NOTICE: THIS PROGRAM BELONGS TO AWARD SOFTWARE INTERNATIONAL(R)
;	        INC. IT IS CONSIDERED A TRADE SECRET AND IS NOT TO BE 	
;	        DIVULGED OR USED BY PARTIES WHO HAVE NOT RECEIVED	
;	        WRITTEN AUTHORIZATION FROM THE OWNER.
;
; 	[]===========================================================[]
;
;----------------------------------------------------------------------------
;Rev	Date	 Name	Description
;----------------------------------------------------------------------------
;R03	11/25/98 RIC	Add VT686 USB PCI routing
;R02	09/23/98 RIC	Change ACPI IRQ assign algorithm to Auto-assigned.
;			If you want to use old algorithm, please define:
;			1."No_ACPI_IRQ_Auto_Assign" for disabled new algorithm.
;			2."ACPI_IRQ_Selectable" for enabled old algorithm.
;R01	09/07/98 ADS	Support "pci_irq_selection" function to fixed smoe card
;			can't be assign IRQ in POST.
;R00	08/15/98 RIC	Initialization.

ifdef	MASM611
.MODEL  SMALL,BASIC
OPTION	PROC: PRIVATE
endif	;MASM611

.386P

		PAGE	56,132
.XLIST
		INCLUDE BIOS.CFG
		include	common.equ

IFE	COMPILE_FOR_RUN_TIME
ifdef	PCI_BUS
ifdef	NEW_PCI_KERNEL
		INCLUDE COMMON.MAC
		include	bsetup.inc

		extrn	NCR_810_Found:ABS
		extrn	E800_Shadow:near
		extrn	Get_Ct:Near
		extrn	Set_Ct:Near
		extrn	Get_Set_Ct:near
		extrn	Get_Set_Ct_OR:near
	        extrn	_Get_Ct:near	   
	        extrn	_Set_Ct:near	   
		extrn	_Get_Set_Ct:near   
		extrn	_Get_Set_Ct_OR:near

		extrn	GetItem_Value:near

ifndef	NEW_PNP_SETUP
		extrn	PCI_IRQ1:near
		extrn	PCI_IRQ2:near
		extrn	PCI_IRQ3:near
		extrn	PCI_IRQ4:near
endif	;NEW_PNP_SETUP
ifndef	ALWAYS_LEVEL_PCI_IRQ
		extrn	PCI_IRQ_Method:near
endif;	ALWAYS_LEVEL_PCI_IRQ

endif	;NEW_PCI_KERNEL
endif	;PCI_BUS

.LIST

EGROUP		GROUP	ECODE

DGROUP		GROUP	FCODE
FCODE		SEGMENT USE16 PARA PUBLIC 'CODE'
		ASSUME	CS:DGROUP

ifdef	PCI_BUS
ifdef	NEW_PCI_KERNEL
		ALIGN	4
		public	Slot1_Info
Slot1_Info:

ifndef	NEW_PNP_SETUP
		ALIGN	4
		public	PciIrq_Item
PciIrq_Item:
		dw	offset PCI_IRQ1
		dw	offset PCI_IRQ2
		dw	offset PCI_IRQ3
		dw	offset PCI_IRQ4
		dw	-1			;last IRQ item
endif	;NEW_PNP_SETUP

;[]==============================================================[]
;Name	   :	Ct_PCI_Info
;
;Function  :	To tell the PCI BIOS Kernel some important
;		chipset informations for PCI's I/O, MEM &
;		ROM initializations.
;
;Input	   :	None
;
;Output	   :	al : Starting device to be scanned (note)
;		ah : Ending device to be scanned   (note)
;		edi: Initial IO Base Addr
;		esi: Initial memory base address
;
;[Note]	   :	AH must be greater than AL i.e. AH > AL, because
;		the PCI Kernel scan PCI slots in INCREASING manner!
;[]==============================================================[]
		ALIGN	4
		Public	Ct_PCI_Info
Ct_PCI_Info	Proc	Near
		call	far ptr E000_Ct_PCI_Info
		ret
Ct_PCI_Info	Endp

;[]==============================================================[]
;Name	   :	Ct_PCI_VGA_IDSEL
;
;Function  :	To tell the PCI BIOS Kernel the onboard PCI
;		VGA ID number
;
;Input	   :	None
;
;Output	   :	cl : onboard PCI VGA ID number
;
;Registers :	Preserve ALL REGISTERS except CX
;
;[Note]	   :   if no onboard PCI VGA present, cl muse be greater than 31
;
;[]==============================================================[]
		ALIGN	4
		public	Ct_PCI_VGA_IDSEL
Ct_PCI_VGA_IDSEL	proc	near

ifdef	ONBOARD_PCI_VGA
		mov	cl,(ONBOARD_PCI_VGA SHL 3)
else	;ONBOARD_PCI_VGA
		mov	cl,0FFh
endif	;ONBOARD_PCI_VGA
		ret
Ct_PCI_VGA_IDSEL	endp

;[]==============================================================[]
;Name	   :	Ct_Special_PCI_Device
;
;Function  :	To initialize special devices 
;
;Input	   :	CH - Device number in upper 5 bits
;		     Function number in lower 3 bits
;
;Output	   :	CF - Special device was found in this slot
;		NC - No special device was found
;
;Registers :	Please Preserve ALL REGISTERS except FLAGS
;
;[Note]	   :	Example:
;
;			call	Get_Vendor_ID
;			cmp	ax,SPECIAL_DEVICE_1
;			jne	short @F
;				.
;				.
;				.
;			stc
;			ret
;		@@:
;			clc
;			ret
;
;[]==============================================================[]
		ALIGN	4
		Public	Ct_Special_PCI_Device
Ct_Special_PCI_Device	Proc	Near
		clc
		ret
Ct_Special_PCI_Device	Endp

;[]==============================================================[]
;Name	  :	Ct_Special_Copy_PCI_VGA
;
;Function :	Some chipset/VGA-chip may need special treatment
;		during copy VGA BIOS to shadow
;
;Input	  :	EAX : bit 15-8 = VGA device ID
;		      bit  7-0 = VGA vendor ID
;
;Output	  :	CF: the standard code to copy VGA ROM in PCIPOST.ASM
;		    will be skipped
;		NC: Nothing special
;
;[]==============================================================[]
		Public	Ct_Special_Copy_PCI_VGA
Ct_Special_Copy_PCI_VGA	Proc	Near
			clc
			ret
Ct_Special_Copy_PCI_VGA	Endp

;[]==============================================================[]
;Name	   :	Ct_C8_To_DF_RW
;
;Function  :	To enable all shadow RAM from C8000h to DFFFFh
;		& make them all R & W enabled
;
;Input	   :	None
;
;Output	   :	None
;[]==============================================================[]
		Public	Ct_C8_To_DF_RW
		ALIGN	4
Ct_C8_To_DF_RW	Proc	Near
		call	far ptr E000_Ct_C8_To_DF_RW
		ret
Ct_C8_To_DF_RW	Endp

;[]==============================================================[]
;Name	   :	Ct_C8_To_DF_R
;
;Function  :	To set all shadow RAM from C8000h to DFFFFh to be
;		Read only
;
;Input	   :	None
;
;Output	   :	None
;
;[Note]	   :	Please "DO NOT" set any segment to be NON-SHADOW
;[]==============================================================[]
		Public	Ct_C8_To_DF_R
		ALIGN	4
Ct_C8_To_DF_R	Proc	Near
		call	far ptr E000_Ct_C8_To_DF_R
		ret
Ct_C8_To_DF_R	Endp

;[]==============================================================[]
;Input	:	DX = shadow segment to be disabled
;
;		DH = C8h : Disable C8000 -> CBFFF shadow
;		DH = CCh : Disable CC000 -> CFFFF shadow
;		DH = D0h : Disable D0000 -> D3FFF shadow
;		DH = D4h : Disable D4000 -> D7FFF shadow
;		DH = D8h : Disable D8000 -> DBFFF shadow
;		DH = DCh : Disable DC000 -> DFFFF shadow
;[]==============================================================[]
		ALIGN	4
		Public	Ct_Disable_Shadow
Ct_Disable_Shadow	Proc	Near
		call	far ptr E000_Ct_Disable_Shadow
		ret
Ct_Disable_Shadow	Endp

;[]==============================================================[]
;Input	:	DH = shadow segment to be enabled and read/writed
;
;		DH = C8h : C8000 -> CBFFF shadow
;		DH = CCh : CC000 -> CFFFF shadow
;		DH = D0h : D0000 -> D3FFF shadow
;		DH = D4h : D4000 -> D7FFF shadow
;		DH = D8h : D8000 -> DBFFF shadow
;		DH = DCh : DC000 -> DFFFF shadow
;[]==============================================================[]
		ALIGN	4
		Public	Ct_Shadow_RW
Ct_Shadow_RW	Proc	Near
		call	far ptr E000_Ct_Shadow_RW
		ret
Ct_Shadow_RW	Endp

ifdef	Combined_Other_PCI_ROM
;[]==============================================================[]
;Procedure :	Ct_If_Combined_ROM_Needed
;
;Input	:	1. CH - Current Device no. & Function No.
;		2. byte ptr CURRENT_DEVICE_ID[bp]
;		3. byte ptr CURRENT_VENDOR_ID[bp]
;		4. byte ptr CURRENT_BUS_NO[bp]
;
;Output	:	1. if NZ Flag - Combined ROM not needed
;		2. if ZR Flag
;		   - Combined ROM needed
;		   - EDI bit 15-8 & Bit 7-0 indicates the location 
;		     the the decompressed ROM
;	
;Note	:	1. Please preserve all registers except EDI
;
;		2. Steps to combine a special PCI ROM:
;
;		   - type "i:cbrom.bat /other ROM_File" under DOS prompt
;
;		   - this batch file will ask you for the address
;		     location where this ROM_File will be expanded to
;
;		   - Enter the addr. location. Normally we use 1800:0
;
;		   - BATCH file will automatically compress the ROM_FILE
;		     and add it to the System BIOS.
;
;		3. In this routine, please compare the current device
;		   ID with the device that the combine ROM is belong to.
;		   If yes, please tell the BIOS kernel the location of
;		   the ROM. In the above case, EDI should return with
;		   80001800h where the one in 1800:0 is the original image
;		   & the one in 8000:0 is duplicated for security
;[]==============================================================[]
		Public	Ct_If_Combined_ROM_Needed
Ct_If_Combined_ROM_Needed	Proc	Near
		extrn	CURRENT_DEVICE_ID:ABS
IF	Combined_Other_PCI_ROM EQ 1
		cmp	dword ptr CURRENT_DEVICE_ID[bp],(8086H shl 16)+122EH
		jne	short No_IdeMaster
		extrn	Mide_Item:near
		mov	si,offset Mide_Item
		call	GetItem_Value
		or	al,al
		jnz	short No_IdeMaster
		mov	edi,(8000h shl 16) + 1800h
No_IdeMaster:
ELSE	;Combined_Other_PCI_ROM EQ 1
		cmp	dword ptr CURRENT_DEVICE_ID[bp], Combined_Other_PCI_ROM
		jne	short @F					
		mov	edi,(8000h shl 16) + 1800h			
	@@:								
ENDIF	;Combined_Other_PCI_ROM EQ 1					
		ret

Ct_If_Combined_ROM_Needed	Endp
endif	;Combined_Other_PCI_ROM

endif	;NEW_PCI_KERNEL
endif	;PCI_BUS

FCODE		ENDS

;--------------------------------------------------------------
;--------------------------------------------------------------
;----- The following codes will be located at E000 ! ----------
;----- The following codes will be located at E000 ! ----------
;----- The following codes will be located at E000 ! ----------
;----- The following codes will be located at E000 ! ----------
;--------------------------------------------------------------
;--------------------------------------------------------------
ECODE		SEGMENT USE16 PARA PUBLIC 'ECODE'
		ASSUME	CS:EGROUP,ES:EGROUP

ifdef	PCI_BUS
ifdef	NEW_PCI_KERNEL

  IFDEF	ACPI_Support				;R02 - start
    IFNDEF	No_ACPI_IRQ_Auto_Assign
		public	Ct_SetAcpiIrq	
Ct_SetAcpiIrq	proc	far

		mov	bl, al			;IRQ number
		mov	ch, 01H			;level trigger
		call	Set_Level_Irq

		mov	al, bl			; IRQ to program
		mov	cx, VT586_ACPI + 42h	; Set SCI IRQ according to
		call	_Set_Ct			; Setup setting.

		ret
Ct_SetAcpiIrq	endp
    ENDIF;	No_ACPI_IRQ_Auto_Assign
  ENDIF;ACPI_Support				;R02 - end

;[]==============================================================[]
;Set_Level_Irq:
;	Set level trigger for port 4d0h & 4d1h
;Saves: all
;Input : BL - IRQ level to set
;	 CH - IRQ trigger 0-edge, 1-level
;Output: None
;[]==============================================================[]
		ALIGN	4
 		Public	Set_Level_Irq
Set_Level_Irq	Proc	Far

		test	ch,01H
		jz	short Not_Level

		pushad

		;Disable INT before program 8259
		in	al,0a1h
		mov	ah,al
		in	al,21h
		push	ax	     		;save original interrupt mask
		mov	al,0ffh			;mask all interrupt
		out	21h,al
		IODELAY
		out	0a1h,al

;;config register 4D0h & 4D1h for level trigger interrupt
;;; ????? Where to set 4d0, 4d1 initial value, See Triton code

		mov	dx,04d0h
		cmp	bl,8
		mov	cl,bl
		jb	short Below_Irq8
		sub	cl,8
		inc	dl
Below_Irq8:
		mov	ah,1
		shl	ah,cl

		in	al,dx
		or	al,ah
		out	dx,al

		;Restore 8259 status
		pop	ax			;restore interrupt mask
		out	21h,al
		xchg	ah,al
		out	0a1h,al

		popad
Not_Level:
		ret
Set_Level_Irq	Endp

;[]==============================================================[]
;Name	   :	E000_Ct_PCI_Info
;
;Function  :	To tell the PCI BIOS Kernel some important
;		chipset informations for PCI's I/O, MEM &
;		ROM initializations.
;
;Input	   :	None
;
;Output	   :	al : Starting device to be scanned (note)
;		ah : Ending device to be scanned   (note)
;		edi: Initial IO Base Addr
;		esi: Initial memory base address
;
;[Note]	   :	AH must be greater than AL i.e. AH > AL, because
;		the PCI Kernel scan PCI slots in INCREASING manner!
;[]==============================================================[]
		ALIGN	4
E000_Ct_PCI_Info	Proc	Far

		mov	al,0		;starting device to be scanned
		mov	ah,31		;ending device to be scanned

		mov	ecx,0F8000000h	;Temporary addr. for ROM	;Rpp
		mov	esi,0E0000000h	;initial memory addr. space	;Rpp
		mov	edi,0FFFFFFFFh	;maximun memory Base Addr space

		mov	ebx,000006400H	;Initial IO Base Addr space
		mov	edx,00000FFFFh	;maximun IO Base Addr space

		ret

E000_Ct_PCI_Info	Endp

;[]==============================================================[]
;Name	   :	E000_Ct_C8_To_DF_RW
;
;Function  :	To enable all shadow RAM from C8000h to DFFFFh
;		& make them all R & W enabled
;
;Input	   :	None
;
;Output	   :	None
;[]==============================================================[]
		ALIGN	4
E000_Ct_C8_To_DF_RW	Proc	Far

		pushad
		mov	cx,VT692 + 61h
		mov	bl,11110000b
		call	_Get_Set_Ct_OR

		mov	cx,VT692 + 62h
		mov	al,11111111b		;d0-df read/write
		call	_Set_Ct
		popad

		ret
E000_Ct_C8_To_DF_RW	Endp

;[]==============================================================[]
;Name	   :	E000_Ct_C8_To_DF_R
;
;Function  :	To set all shadow RAM from C8000h to DFFFFh to be
;		Read only
;
;Input	   :	None
;
;Output	   :	None
;
;[Note]	   :	Please "DO NOT" set any segment to be NON-SHADOW
;[]==============================================================[]
		ALIGN	4
E000_Ct_C8_To_DF_R	Proc	Far

		mov	cx,VT692 + 61h
		mov	bx,1010000000001111b
		call	_Get_Set_Ct

		mov	cl,VT692 + 62h
		mov	al,10101010b		;d0-df write protect
		call	_Set_Ct

		ret

E000_Ct_C8_To_DF_R	Endp

;[]==============================================================[]
;Input	:	DX = shadow segment to be disabled
;
;		DH = C8h : Disable C8000 -> CBFFF shadow
;		DH = CCh : Disable CC000 -> CFFFF shadow
;		DH = D0h : Disable D0000 -> D3FFF shadow
;		DH = D4h : Disable D4000 -> D7FFF shadow
;		DH = D8h : Disable D8000 -> DBFFF shadow
;		DH = DCh : Disable DC000 -> DFFFF shadow
;[]==============================================================[]
		ALIGN	4
E000_Ct_Disable_Shadow	Proc	Far

 		sub	dh,0C8h
 		shr	dh,2
 		mov	al,3
 		mul	dh
 
 		mov	bl,al
 		xor	bh,bh
		add	bx,offset Shadow_Tbl

		xor	ch,ch
		mov	cx,cs:[bx+1]
		Call	_Get_Ct
		and	al,cs:[bx+0]
		Call	_Set_Ct

		ret

E000_Ct_Disable_Shadow	Endp

Shadow_Tbl:
		db	11001111b               ;0C800h
		dw      VT692 + 61h		
		db	00111111b		;0CC00h
		dw      VT692 + 61h
		db	11111100b		;0D000h
		dw      VT692 + 62h
		db	11110011b		;0D400h
		dw      VT692 + 62h
		db	11001111b		;0D800h
		dw      VT692 + 62h
		db	00111111b		;0DC00h
		dw      VT692 + 62h

;[]==============================================================[]
;Input	:	DH = shadow segment to be enabled and read/writed
;
;		DH = C8h : C8000 -> CBFFF shadow
;		DH = CCh : CC000 -> CFFFF shadow
;		DH = D0h : D0000 -> D3FFF shadow
;		DH = D4h : D4000 -> D7FFF shadow
;		DH = D8h : D8000 -> DBFFF shadow
;		DH = DCh : DC000 -> DFFFF shadow
;[]==============================================================[]
		ALIGN	4
E000_Ct_Shadow_RW	Proc	Far

 		sub	dh,0C8h
 		shr	dh,2
 		mov	al,3
 		mul	dh
 
 		mov	bl,al
 		xor	bh,bh
 		add	bx,offset Shadow_RW_Tbl
 
 		mov	ch,VT692
 		mov	cl,cs:[bx+2]
 		Call	_Get_Ct
 		and	al,cs:[bx+0]
 		or	al,cs:[bx+1]
 		Call	_Set_Ct

		ret

E000_Ct_Shadow_RW	Endp

Shadow_RW_Tbl:
		db	11001111b,00110000b,61h		;0C800h
		db	00111111b,11000000b,61h		;0CC00h
		db	11111100b,00000011b,62h		;0D000h
		db	11110011b,00001100b,62h		;0D400h
		db	11001111b,00110000b,62h		;0D800h
		db	00111111b,11000000b,62h		;0DC00h

endif	;NEW_PCI_KERNEL
endif	;PCI_BUS

ECODE		ENDS
ENDIF	;COMPILE_FOR_RUN_TIME

IF	COMPILE_FOR_RUN_TIME
		include	common.equ
		include	common.mac

		extrn	Get_Set_Ct:Near
		extrn	AGet_CfgSpace_Word:Near
		extrn	ASet_CfgSpace_Word:Near
		extrn	Set_Level_Irq:Far
		extrn	Get_Ct:Near
		extrn	Set_Ct:Near

DGROUP		GROUP	FCODE
FCODE		SEGMENT USE16 PARA PUBLIC 'CODE'
		ASSUME	CS:DGROUP

;[]==============================================================[]
;Ct_Set_PciIrq:
;	Program chipset IRQ routing
;Saves: all
;Input : AL - interrupt pin to assign ,value is 1-16
;	      
;	 AH - IRQ No.	
;	 CH - IRQ trigger 0-edge, 1-level
;	      CH=0FFh --> Do not change the Edge/Level setting
;	 CL - slot index 0-slot 1 , 1-slot 2, 2-slot 3 ,3-slot 4
;	    - 4 - USB
;Output: None
;[]==============================================================[]
		public	Ct_Set_PciIrq
Ct_Set_PciIrq	proc	near
		pushad				
		cmp	ch, 0FFh		
		je	short Not_Level_Irq	
ifdef VT586_USB				
		cmp	al,05H			; for USB special ?
		jne	short @F	
		mov	bl,ah		
		mov	ch, 1		
		call	far ptr Set_Level_Irq
		popad
		ret			
@@:					
endif ;VT586_USB			
ifdef	ACPI_Support
    IFDEF	No_ACPI_IRQ_Auto_Assign		;R02
;R02 ifndef	No_ACPI_IRQ_Selectable
  IFDEF	ACPI_IRQ_Selectable			;R02
		pushad
		mov	cx, VT586_ACPI + 42h	; Set SCI IRQ according to
		call	Get_Ct			; Setup setting.
		mov	gs,ax
		popad
		mov	bx,gs
		cmp	ah,bl
		JNE	SHORT @F
		MOV	CH, 01H
@@:
;R02 else;	No_ACPI_IRQ_Selectable
else;	ACPI_IRQ_Selectable			;R02
		CMP	AH, 09H
		JNE	SHORT @F
		MOV	CH, 01H
@@:
;R02 endif;	No_ACPI_IRQ_Selectable			
  ENDIF;ACPI_IRQ_Selectable			;R02
    ENDIF;	No_ACPI_IRQ_Auto_Assign		;R02
endif;	ACPI_Support				

		test	ch,01H			;level trigger ?	
		jz	short Set_lvl_2_Edge				

		test	ch,80h			;level to edge convertion ?
		jz	short @F
Set_lvl_2_Edge:								
		push	cx
		push	ax

		mov	cl,4			;get INT pin
		sub	cl,al
		mov	ah,1
		shl	ah,cl			;bit 0 - INT A , bit 1 - INT B
						;bit 2 - INT C , bit 3 - INT D
                push    ax
		mov	cx,VT586 + 54h            	;INT routing register
		call	Get_Ct
                mov     cl, al                  
                pop     ax
                mov     al, cl
		or	al,ah
		mov	cx,VT586 + 54h            	;INT routing register
		call	Set_Ct

		pop	ax
		pop	cx

@@:
		mov	bl,ah
		cmp	ch, 0FFh
		je	short Not_Level_Irq
		call	far ptr Set_Level_Irq
Not_Level_Irq:

		mov	cx,VT586 + 55h    	;INT routing register
		mov	bl,al			;CX = 55h : INTA  (al=1)
		shr	bl,1			;CX = 56h : INTB,C(al=2/3)
		add	cl,bl			;CX = 57h : INTD  (al=4)

		cmp	al, 02h			; If INTB ?
		je	INT_B			; Yes, Jump !
		shl	ah,4
		mov	al,0fh
		jmp	short Set_INTx_IRQ
INT_B:
		mov	al,0f0h
Set_INTx_IRQ:
		mov	bx, ax
		call	Get_Set_Ct

		popad
		ret
Ct_Set_PciIrq	endp

ifdef	USB_SUPPORT
;[]==============================================================[]
;Input	:	DH = shadow segment to be read only
;
;		DH = C8h : C8000 -> CBFFF shadow
;		DH = CCh : CC000 -> CFFFF shadow
;		DH = D0h : D0000 -> D3FFF shadow
;		DH = D4h : D4000 -> D7FFF shadow
;		DH = D8h : D8000 -> DBFFF shadow
;		DH = DCh : DC000 -> DFFFF shadow
;[]==============================================================[]
		ALIGN	4
		Public	Ct_Shadow_R
Ct_Shadow_R	Proc	Near

		sub	dh,0C8h
		shr	dh,2
		mov	al,dh
		mov	bl,3
		mul	bl
		
		mov	bx,ax
		add	bx,offset Shadow_R_Tbl

		mov	cx,VT692
		add	cl,byte ptr cs:[bx+2]
		Call	Get_Ct
		and	al,byte ptr cs:[bx+0]
		or	al,byte ptr cs:[bx+1]
		Call	Set_Ct

		ret
Ct_Shadow_R	Endp
Shadow_R_Tbl:
		db	11101111b,00100000b,61h		;0C800h
		db	10111111b,10000000b,61h		;0CC00h
		db	11111110b,00000010b,62h		;0D000h
		db	11111011b,00001000b,62h		;0D400h
		db	11101111b,00100000b,62h		;0D800h
		db	10111111b,10000000b,62h		;0DC00h
endif	;USB_SUPPORT

;[]==============================================================[]
;Name	   :	Ct_Shadow_Unit
;
;Function  :	To tell the PCI BIOS Kernel the shadow unit of
;		the chipset
;
;Input	   :	None
;
;Output	   :	CX = 4000h : shadow unit is 16K bytes
;		CX = 8000h : shadow unit is 32K bytes
;		All other values are reserved
;
;Registers :	Preserve ALL REGISTERS except CX
;
;[]==============================================================[]
		ALIGN	4
		Public	Ct_Shadow_Unit
Ct_Shadow_Unit	Proc	Near
		mov	cx,4000h
		ret
Ct_Shadow_Unit	Endp

 ifdef	PATCH_WILLIT_YEAR2000
;[]==============================================================[]
; Ct_Save_RTC_Index
;			Save 70 port CMOS index value to AL.
;Input : none
;Output: AL : RTC Index Value
;[]==============================================================[]
		align 4
		public	Ct_Save_RTC_Index
Ct_Save_RTC_Index	proc	near  

		in	al,70h
		NEWIODELAY
		NEWIODELAY

		ret
Ct_Save_RTC_Index	endp
 endif;	PATCH_WILLIT_YEAR2000

		ALIGN	4
		public	IrqRout_Table
IrqRout_Table:	; 	INT A,INT B,INT C ,INT D
ifdef	VT692_PP
  IFNDEF	AGP_INTA
		db	1,2,3,4				;AGP slot
  ELSE;		AGP_INTA
		db	AGP_INTA, AGP_INTB, AGP_INTC, AGP_INTD
  ENDIF;	AGP_INTA
endif;	VT692_PP
ifdef VT586_USB
  IFDEF	VT686						;R03 
		db	1, 2, 3, 4			;R03 INTD
  ELSE;	VT686						;R03 
		db	5, 5, 5, 5			;USB Slot
  ENDIF;VT686						;R03 
endif ;VT586_USB
		public	IrqRout_1stSlot			;R01
IrqRout_1stSlot:					;R01
		db	SLOT1_INTA,SLOT1_INTB,SLOT1_INTC,SLOT1_INTD ;slot 1
ifndef ONE_PCI_SLOT_ONLY
		db	SLOT2_INTA,SLOT2_INTB,SLOT2_INTC,SLOT2_INTD ;slot 2
ifndef TWO_PCI_SLOT_ONLY
		db	SLOT3_INTA,SLOT3_INTB,SLOT3_INTC,SLOT3_INTD ;slot 3
ifndef THREE_PCI_SLOT_ONLY
		db	SLOT4_INTA,SLOT4_INTB,SLOT4_INTC,SLOT4_INTD ;slot 4
endif ;THREE_PCI_SLOT_ONLY
endif; TWO_PCI_SLOT_ONLY
endif; ONE_PCI_SLOT_ONLY
IF	SLOT5_EXIST
 		db	SLOT5_INTA,SLOT5_INTB,SLOT5_INTC,SLOT5_INTD ;slot 5
ENDIF;	SLOT5_EXIST
IF	SLOT6_EXIST
 		db	SLOT6_INTA,SLOT6_INTB,SLOT6_INTC,SLOT6_INTD ;slot 6
ENDIF;	SLOT6_EXIST
IF	SLOT7_EXIST
 		db	SLOT7_INTA,SLOT7_INTB,SLOT7_INTC,SLOT7_INTD ;slot 7
ENDIF;	SLOT7_EXIST
ifdef	ONBOARD_SCSI_SLOT					    
		public		Scsi_RoutTable
	Scsi_RoutTable:
		db	SCSI_INTA,SCSI_INTB,SCSI_INTC,SCSI_INTD	    
endif;	ONBOARD_SCSI_SLOT					    
ifdef	ONBOARD_VGA_NEED_IRQ					    
		db	VGA_INTA,VGA_INTB,VGA_INTC,VGA_INTD	    
endif;	ONBOARD_VGA_NEED_IRQ					    

;[]=====================================================================[]
; PCI_SLOT_CFG:
;	PCI slot IDSEL informations.
;[]=====================================================================[]
		ALIGN	4
		public  PCI_SLOT_CFG
PCI_SLOT_CFG    label   byte
ifdef	VT692_PP
		db	(AGP_SLOTID SHR 3)	;AGP slot number
endif;	VT692_PP
ifdef VT586_USB
		db	VT586_USB_ID		;USB IDSEL
endif ;VT586_USB
		public	SlotId_1stSlot
SlotId_1stSlot:
		db	SLOT1_ID			;slot 1
		db	SLOT2_ID			;slot 2
		db	SLOT3_ID			;slot 3
ifndef	THREE_PCI_SLOT_ONLY					
		db	SLOT4_ID			;slot 4
endif;	THREE_PCI_SLOT_ONLY					
IF	SLOT5_EXIST
		db	SLOT5_ID		;slot 5		
ENDIF;	SLOT5_EXIST
IF	SLOT6_EXIST
		db	SLOT6_ID		;slot 6
ENDIF;	SLOT6_EXIST
IF	SLOT7_EXIST
		db	SLOT7_ID		;slot 7
ENDIF;	SLOT7_EXIST
ifdef	ONBOARD_SCSI_SLOT					  
		db	ONBOARD_SCSI_SLOT	;onboard scsi slot
endif;	ONBOARD_SCSI_SLOT					  
ifdef	ONBOARD_VGA_NEED_IRQ			  	    
		db	ONBOARD_PCI_VGA		  	    
endif;	ONBOARD_VGA_NEED_IRQ			  	    
		db	0ffh				;end of slot

FCODE		ENDS

ENDIF	;COMPILE_FOR_RUN_TIME


		END